Semtech Corporation, a leading provider of high-performance semiconductors powering AI data center networking and intelligent, connected Internet of Things (“IoT”) devices worldwide, introduced a family of 224G linear Transimpedance Amplifier (TIA) and driver solutions, designed to accelerate the deployment of Near-Packaged Optics (NPO) and Co-Packaged Optics (CPO) architectures for AI/ML clusters, hyperscale data centers and next-generation networking platforms.
As AI workloads continue to drive unprecedented demand for bandwidth and connectivity, traditional optical architectures face increasing challenges in power consumption, thermal management, signal integrity, and system density. By bringing high-performance optical interfaces closer to the switching and compute silicon, NPO and CPO architectures offer a path toward significantly higher bandwidth density and improved system-level efficiency.
“Near-packaged and co-packaged optics are entering their initial ramp in 2026, and the shift toward NPO and CPO architectures reflects a broader industry response to the power and scaling bottlenecks facing AI back-end networks. As hyperscalers move these architectures from trials to deployment, the underlying TIA and driver technology becomes a critical enabler of that transition.”
– Sameh Boujelbene, Vice President, Data Center Switch and AI networks market research, Dell’Oro Group
Designed for 224G Linear Optical Architectures
Semtech’s new products include the GN1838L and GN42T380, the industry’s first linear octal TIAs, and the GN42M380 linear octal Mach-Zehnder Modulator (MZM) driver, optimized for 1.6T, 3.2T, 6.4T, and 12.8T optical engines (OEs). The 224G TIA and driver portfolio optimizes for CEI-224G-Linear and Open CPX interfaces and linear architectures, with very strictly specified space and power dissipation requirements.
“AI infrastructure is fundamentally changing the requirements for optical connectivity. At 224G per lane, designers need more than bandwidth. They need signal integrity, power efficiency, flexibility, and system-level visibility. Our TIAs and driver solutions are purpose-built to give NPO and CPO developers the building blocks to scale optical I/O while addressing the power and density challenges of next-generation AI systems.”
– Amit Thakar, Vice President, Signal Integrity Product Marketing, Semtech
Enabling NPO and CPO at Scale
The GN1838L TIA offers 500µm channel pitch and the GN42T380 offers a 375µm channel pitch, giving customers flexibility in OE design choices. These TIAs can be used in side-by-side configuration with the photonics integrated circuit (PIC) or placed directly on top of the PIC, giving customers maximum flexibility. Both TIAs include an Automatic Gain Control (AGC) stage and output driver featuring programmable Continuous Time Linear Equalization (CTLE) and support both Manual and Automatic Gain Control (MGC and AGC) modes. The bandwidth is optimized to achieve low peaking, low input referred noise (IRN), and good group delay with minimal distortion. The devices offer several programmable performance optimization features, including output equalization, and are designed to interface with a wide variety of optical input signals, while optimizing performance at the switch or ASIC input.
The GN42M380 driver offers 375µm channel pitch and supports a variety of modulators, including Silicon Photonics (SiPho), Indium Phosphide Mach-Zehnder Modulator (InP MZM) and Thin-Film Lithium Niobate (TFLN). The GN42M380 delivers low group delay and minimal Total Harmonic Distortion (THD), ensuring superior driver performance. Programmable Continuous Time Linear Equalization (CTLE) is included to help compensate for intersymbol interference (ISI) due to the input signal transmission path. It also offers flexible biasing, making it compatible with MZMs from various vendors. The driver output swing is configurable, and on-chip equalization enables precise tuning of electrical and optical performance.
The TIA and driver family integrates several diagnostics and performance tuning features that can be accessed through device pads and the I²C interface.
